Power factor correction (PFC) circuits are utilised to reduce harmonics on power lines and in particular, make the circuit, including the attached load, appear to be substantially purely resistive load. The aim of power factor correction circuits is to ensure that the AC voltage and current are substantially in phase. This improves efficiency and at the same time eliminates the generation of harmful harmonics. For example, IEC 61000-3-2 Class A applies to input current up to 16 A per phase. Power factor correction with input current between 10 A to 16 A is expensive to implement. Prior art in Japanese patent no. 3535902 compares output voltage and current of control switch, which requires multiplier in the control circuit to generate switching signals. Circuit with multiplier is more complicated and more sensitive to noise.
Another prior art Japanese patent no. 2675509 implements the current sensor using current transformer to detect current discharged from inductor. Current sensing circuit in this prior art is using current transformer, which is more complicated than current detection using current sensing resistor.
It is an object of the present invention to improve the power correction circuit.